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xDSL Network Processor Announced by Infineon

Company:  

Infineon Technoligies

Category:  

New Products

Date:  

27-Sep-1999

INFINEON TECHNOLOGIES ANNOUNCES xDSL NETWORK PROCESSOR

New HarrierÔ -XT Network Processor Is First Entry In Family Of High-Integration Devices For Protocol Handling In Internet, Digital Network Access Applications

San Jose, Calif., Sept. 27, 1999 -- Infineon Technologies Corporation today introduced the Harrier-XT intelligent protocol handling and controller integrated circuit (IC) for xDSL (Digital Subscriber Line) customer-premise equipment, including integrated access devices supporting combined data and voice services.

Based on Infineon’s 32-bit TriCore™ architecture, the Harrier-XT network processor is targeted at ATM (Asynchronous Transfer Mode) and HDLC (High-Level Data-Link Control) network termination applications.

The Harrier-XT network processor supports full-duplex xDSL sustained data throughput rates of 13 Mbits/second, providing headroom for service offering upgrades from the ADSL rates that are typically available to individual and small-business xDSL service subscribers today.

Features include:

  • 50MHz TriCore Processor
  • 48K SRAM
  • On-chip debug and emulation support with real-time trace
  • JTAG interface and boundary scan testing per the IEEE 1149.1 standard.
  • Both Ethernet and ATM interfaces
  • three general-purpose configurable ports,
  • three 32-bit general-purpose timers,
  • Watchdog Timer
  • System Timers
  • PCM (Pulse Code Modulation) interfaces for up to four combined voice/data channels,
  • autosensing Ethernet MAC (Media Access Controller)
  • two-channel HDLC protocol controller
  • T1/E1 circuit emulation
  • AAL1 and AAL5 (ATM Adaptation Layer) support
  • Up to 128 Virtual Circuits with a priority and WFQ scheduling mechanism
  • Bundled with interface drivers and low-level software modules developed by Inverness Systems, Inc.
  • Standard API (application programming interface) developed for the Harrier network processor platform.
  • Network access protocols can be downloaded into Harrier-XT devices,  such as FTTH/FTTC (fiber-to-the-home/fiber-to-the-curb) access, HFC (hybrid fiber-copper) access, wireless access, SOHO (small office/home office) routers and ATM multiplexers

 

A Family of Network Processors

The Harrier-XT network processor is the first member of the Harrier family of network processor ICs based on Infineon’s TriCore™ unified processor core architecture. By using a single-core engine to execute digital signal processing, microcontroller and microprocessor tasks, the Harrier platform achieves significant improvements in performance and integration for digital network access applications, including Internet connectivity and constant-bit-rate services, such as voice and video delivery.

"There's no doubt that the market for network processors is huge, and the Harrier-XT targets the hot, under-served xDSL network termination chip segment," said Will Strauss, president of industry analyst firm Forward Concepts. "All kinds of players are now in the network processor market, or are coming after it, and the winners will be those who give the customers what they want in terms of performance, flexibility and application optimization. The Infineon Harrier platform is well positioned to address all those user needs for anyone designing network access devices."

The architecture of the Harrier platform uses proven hardware macros to execute physical layer interface and bit-oriented functions that need to operate at line speed. Above the data link layer, software processing takes advantage of the fast context switching, low-latency interrupt response and other features of the TriCore unified processor architecture to provide superior real-time application performance.

Infineon plans to develop a series of Harrier products using optimized hardware macros to implement the protocol-handling algorithms of specific applications, while retaining flexibility to program higher-level functionality.

Pricing, Availability

The Harrier-XT (PXB 4260) network processor will be available for sampling in the fourth quarter of 1999, with production availability planned for the second quarter of 2000. Packaged in a 272-pin plastic ball-grid array (PBGA), the Harrier-XT is priced at $39.00 in quantities of 1,000. An evaluation kit (EZ4260), comprising a board-mounted Harrier-XT IC, device drivers and low-level software modules, a VxWORKS board support package that adapts VxWorks for a specific board, and coding tools, will also be available with the sample silicon.

The IC is fabricated in 0.25-micron CMOS, operates from 2.5 V and 3.3 V sources, and consumes 1.9 W of power.

Infineon Technologies

Infineon Technologies (formerly Siemens Semiconductor Group) based in Munich, Germany, was ranked by Dataquest as the 10th largest semiconductor manufacturer worldwide in 1998. Infineon provides semiconductor solutions for the telecommunications, automotive, data networking, consumer electronics, and industrial automation markets. The company’s comprehensive product portfolio includes integrated system ICs, memory and high frequency components, smart card ICs, discrete semiconductors and power ICs, sensors and fiber optic components. In fiscal 1997/98, the company achieved sales of $3.8 billion (DM 6.7 billion) and employed 25,000 people worldwide. Further information at http://www.infineon.com.

Infineon Technologies Corporation is the company’s North American subsidiary, with headquarters at 1730 North First Street, San Jose, CA 95112. For more information, contact 1(888) 463-4636; (408) 501-6000.

Infineon and the Infineon logo are trademarks of Siemens AG. Harrier and TriCore are trademarks of Infineon Technologies AG. All other trademarks are the property of their respective owners.

Any statements in this document that are not historical facts are forward looking statements that involve risks and uncertainties; actual results may differ from the forward-looking statements. Infineon Technologies AG undertakes no obligation to publicly release the results of any revisions to these forward-looking statements that may be made to reflect events or circumstances after the date hereof or to reflect the occurrence of unanticipated events.

 

 


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