New Enhanced TriCore Architecture for Linux, WindowsCE, and EPOC32

New Enhanced TriCore Architecture for Linux, Windows CE, EPOC32, and Parallel Computing

Company:	Infineon Technology
Category:	New Products
Date:	13-June-2000

MUNICH, Germany/SAN JOSE, Calif. June 13, 2000 - Infineon Technologies today introduced Version 1.3 of its TriCore™ Unified Processor Core architecture. Features of the new core include: 0.18µ CMOS process technology 250 MIPS at 166MHz microcontroller and DSP processing Core frequency of up to 200MHz Memory Management Unit (MMU) to support Linux, Windows CE, and EPOC32 High-speed local memory bus to better support parallel compute operations New application specific standard products (ASSPs) based on Version 1.3 of the TriCore Unified Processor architecture, including products utilizing the integrated MMU, are expected to sample late in 2000. Infineon also will license the core architecture as a part of the company's open processor IP policy. Broadened Scope of Applications The TriCore Unified Processor architecture is well suited for applications that previously required separate MCU and DSP components. It has already been implemented in processors for industrial computer control, automotive engine controls, and telecommunications. With the addition of the MMU, additional application categories and markets are now open to solutions based on the architecture. The Version 1.3 Microprocessor System announced this week 166 MHz core frequency 5.9 million transistor design CPU die area less than 3 mm² Total of 64 Kbytes of memory MMU co-processor interface 64-bit local memory bus power management On-chip debug capability Development Tool Compatibility and Support As with previous versions of TriCore Unified Processor architecture, complete development tools from several leading third-party vendors are starting to become available for Version 1.3. All tools that currently support Version 1.2 are compatible with Version 1.3. Development tools from Tasking offer full support for Version 1.3 (MMU + additional new features), and other tool vendors, including Green Hills Software, Inc., will provide support in the near future. Technology Background The parallel computing performance of the TriCore Unified Processor architecture is based on its use of a single instruction set to execute both control and DSP tasks on a single processing engine. The superscalar pipeline implementation of the CPU enables execution of up to three instructions per cycle, and a hardware-supported task-switching mechanism enables fast interrupt handling, which is critical for real-time performance. This allows designers to dynamically allocate the available processing resources to either DSP or control tasks, eliminating the inherent waste associated with fixed hardware partitioning that often leaves relatively large portions of the processing power idle at any given time. A key feature of the TriCore Unified Processor architecture is the availability of an integrated development environment and system design tool chain, supporting concurrent development of both control and DSP application code using a common tool set. This is important to developers working to meet the compressed system design timetables that are increasingly common in development of embedded products. In independent benchmark tests during 1999, the architecture was compared both to stand-alone microcontroller and DSP devices. It was demonstrated that the TriCore Unified Processor delivers superior performance in DSP tasks, while achieving the memory usage and code size advantages of best in class MCUs. The recently published results of tests conducted by EEMBC, a broadly supported industry group developing comprehensive applications tests for embedded devices, also concluded that a TriCore-based general purpose CPU achieves excellent performance on a cycle-by-cycle basis when compared to alternative processor architectures. Further information about TriCore is available at www.infineon.com/tricore. About Infineon Infineon Technologies AG, Munich, Germany, offers semiconductor solutions for applications in the wireless and wired communications markets, for the automotive and industrial sectors, for security systems and chip cards as well as memory products. With a global presence, Infineon operates in the US from San Jose, CA, and in the Asia-Pacific region from Singapore. In the fiscal year 1999 (ending September), the company achieved sales of Euro 4.24 billion (US $ 4.51 billion) with about 26,000 employees worldwide. Further information is available at Infineon's website.

Microcontrollers for Embedded Systems Designers

New Enhanced TriCore Architecture for Linux, Windows CE, EPOC32, and Parallel Computing

Microcontrollers for
Embedded Systems
Designers